Data processing systems



Alm'l 27, 1965 E. P. G. WRIGHT :TAL 3,181,123

DATA PROCES S ING S YSTEMS 4 Sheets-Sheet 1 Filed Feb. 5, 1959 April 27,1965 E. P. G. WRIGHT ETAI. 3,181,123

DATA PROCESSING SYSTEMS Filed Feb. 5, 1959 4 Sheets-Sheet 2 EL EME/v7(oA/E FOR 6A c une) cou/v ns@ me sroRf n2/C) SHIFT REG/STER 8( of /p 5 l5 CHARACrf/Q i l l 1 Zic cou/vg@ 22C 202 206 0/5 TR/t/ TOR aece asc)sofa (f7) e G20/(f2) aff, a 1

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Inventor Harney April 27, 1965 E. P. G. WRIGHT ETAL 3,181,123

DATA PROCESSING SYSTEMS Filed Feb. 5, 1959 4 sheets-sheet 4 wail- C 52554 2/f0 Q40/ 2/f/ United States Patent O 3,181,123 DATA PROCESSINGSYSTElNlS Esmond Philip Goodwin Wright and Donald Adams Weir, London,England and Raymond Cecil Price Hinton, Teaneck, and Boris Dzula,Clifton, NJ., assignors to International Standard Electric Corporation,New York,

Filed Feb. 5, 1959, Ser. No. 791,498 Claims priority, appli GreatBritain, Feb. 6, F353, 3,993/58 6 Claims. (Cl. S40-172.5)

This invention relates to data processing systems, such as are used inelectronic computers, electronic storage telegraph systems, and thelike.

In so-called electronic systems of this type, the processing of aninstruction or a message through the system takes place largely orWholly by electrical processes which involve no mechanical movement(apart, in some cases, from transport of a storage medium), and storageof data, when required, is carried out by the creation of internalstrains in the material of the store. Such storage media, as is nowwell-known, comprise cathode ray tubes, acoustic delay lines. ferriterings or blocks, magnetic wires or tapes, magnetic drums or discs, toname but a few, and in some of the magnetic types referred to,transport, or movement, of the medium must be provided.

An object ofthe present invention is to provide a procn essing device,common to a number of signalling channels in a data processing system,and able to serve all the channels concerned in turn by a relativelyrapid speed of operation on a time-sharing basis.

According to the present invention, a data processing system is providedwhich comprises a plurality of signal channels, stores individuallyassociated, one with each said signal channel, signal transfer equipmentfor continuously transferring signals traversing said channels to saidrespective stores, so as to feed a constantly-changing,` constant lengthsignal combination, constituted at any moment by the last sequence ofsignals of said constant length on a channel, into each said storeduring signal transmission on the respective signal channels, means forif examining the current contents oi each of said stores for at leastone predetermined signal combination, and means for giving a signalrelating to the corresponding signal channel when a predetermined signalcombination is dctected in a store.

In this invention, a "constantly-chitnging, constant length signalcombination might be constituted by, say, the last eight charactersfully received in a channel, and subject, therefore, to constantmodification as subsequent characters (signai groups) are received,while the processing function concerned can be of several types. @neexample would be to examine a number of consecutive characters to detecta predetermined combination which may have the significance of messagestart, message end;5 interrupt message, or resume message. Another formof processing would involve translation from one telegraph code, and as7 unit, to another telegraph code, such as cable code. Yet anotherapplication would be the translation necessary ter conversion from anerror correcting code to 7 unit code or vice versa. Yet anotherapplication would relate to enciphering or deciphcring of messages.

In the centre, of which the common processing equipment only is to bedescribed, 5G telegraph channels operating at 50 bauds can be served bya common processing equipment which is associated with each of thechannels in turn for a period of l inillsecond. Conversely cach channelis associated with the processing equipment once every 50 milliseconds,so that an association takes place between the scanning of the channelfor the lar-t intelligcnce elfI ent of each character and scanning lTicirst intelligence element ci the character which follows.

Evidently thc savings made possible by providing one tlctm e circuitrather than frtty can more than otiset the supply of certain auxiliaryapparatus for the association function.

in general terms the arrangement can be achieved by providn cach of thetitty channels with a character store i a tty. t; device, the latterbeing operated immediately ter the titth intelligence clement of eachcharacter is scanned in the character store. The common detector cfument would comprise a store, such as a track of a f ieic drum holding2,060 elements, and associated sing and wi ing circuits, each of whichis connected with a in'gnctic head. The track can thus provide 40element capacity for each of the 50 channels, and it is 1l telegraphchannel contain a record of the last eight characters to have beenreceived. The reading circuit extracts this information character bycharacter and channel by channel. li an additional character has beenreceived in the line circuit since the last association, it is added tothe record, and the character which has been in store longest When thereis no new character to add, are replaced unmodified. Each time the c achartctcr tain Whether t.

represent any of the predetermined combinano on recognition a signal ispassed to the channel c i i It is possible that the al dos.; not relateto thc inward tralic but relates to to stop transmitting on a specifiedoutgoing channel. and in sum1 a case, the signal can be directedswitching circuits to the outgoing through appropriate The inventionwill be described with reference to the accompin ying drawingsillustrating a preferred embodi- Inct ot; a telegraph switching system,and in which:

lib?. l a blocl: diagram of a system illustrating the characterdetection equippassin intelligence forward to a terminal 192, via astorngo ipuce LS on the way. 11i) is a common processing cqt pmentassociated with the 5G channels by distributor ESL, shown at the rightof the figure. En addition, it is associated with the track 11D of amagnetic drum by means ot' reading amplifier HR and a writing amplifierr.. 'v'. it is arrtxged that the distance between the two hea .sassociated with the track 11D is so related to the drum speed that whenno insertion is made, the characters read by HR are replaced by HW inthe same element positions from which they were withdrawn. When aninsertion is made, the characters are each shifted one clcmcrt in thedirection opposite to the direction of movement of the drum surfaceduring the reading and writing process to malte room for the new one tobe added. The processor lllJ includes an insertion circuit whichreceives a signal over 23C when there is a character to insert. rzfhcnno such signal is received, it is unnecessary to check the recordedcharacters, and, in fact, unnecessary to rerccord what is alreadyrecorded, though preferable to do so, in any practicable system.

iilG. 2, which is a diagram illustrating the insertion the 5ft-eceoniement, includes a counter einer; pulses llp derived from themagnetic drum to dcline the element positions of a character :trainee onthe drum. An E-stage counter 226, driven by BiC in its final position bymeans of a coincidence gate to which the clock pulses 11p are applied aswell as a potential from 21C5, operates to define the eight charactersassociated with each channel, and distributor 23C, which is driven by22C and 21C in their final positions, by means of a coincidence gate towhich the outputs of 21C5 and 22C8, as well as the clock pulses 11p, areapplied, associates the processor 1IP with the channels in turn. Atrigger 21F is provided to recognize when there is a new character toadd. The distributor 23C enables each channel to be examined insequence. It has been rnentioned previously that each channel has atrigger (not shown) recording when a character has just been received,and this trigger (for channel 1) provides a signal to the terminal201:1(1) which, together with potentials from 21C5, 22C8, and 23C1,opens gate G201t1) so as to cause 21f1 to conduct. It should beunderstood that corresponding gates (G201(2)G201(n) are associated withthe other channels (as defined by the respective positions of 23C).

A shift register 21S is provided to receive the character just recordedfrom the channel concerned, each of which is also provided with aS-position shift register LS from which a character can be transferreddirect to 21S. It should be understood that the position of 23C allowstransfer to take place only from the channel with which it istemporarily associated, via the appropriate group n of the leads 2020i)to 20601), where n is any one of the fifty channels. When 21f1 conducts,it applies a signal to the terminal 20111 which is extended inconjunction with 23C to prepare the resetting of the channel triggerannouncing a character to be added. The trigger 22F aids 21F, as will bedescribed later.

Although an individual line circuit has not been shown, reference may bemade to U.S. Patent No. 2,932,688, issued April l2, 1960, for a completedescription, which deals with just this problem of receiving telegraphinformation from a line circuit, staticising it character by characteron the pattern movement register (LS), and energising a trigger toindicate the reception of each character. In the said priorspecification, R1, FIG. 2, is the register and F4, FIG. 4, the trigger,and R1 could well be identified with shift register 21S of the presentdisclosure (if the 0 section of R1 is ignored), or could be arranged asL found on terminal 201a01) and on terminals 20201)- 20601) (feeding 21Svia gates G202-G206), and the condition of 21F will be determinedaccordingly. It will be understood that the effective association forany one channel is during the inter-character pause, between the receiptof the last element of the character and the iirst element of the next,a period of about 7() ms. Thus, 21F will either remain in position 0, orbe conditioned to position l by a coincidence on G20101) between asignal on 29h01) and signals from 21C, 22C and 23C, at the end of acycle of 22C, just before 23C is advanced to its next distributorposition. However, it is important to bear in mind that what is readfrom the drum in one cycle of 22C (one specified position of 23C) is notrewritten until the next cycle, since the heads are eight characterpositions apart and the pattern register holds the eight characters atany moment all from one channel, or divided between two channelsaccording to the position of the cycle, the insertion of a characterelement at one end causing an element to be displaced from the other endof the pattern register to the writing head. Consequently,

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trigger 21F must retain a record of the availability of a character fromthc channel with which 11F was last associated and from which itobtained the character stored in IAS ready for insertion in theinformation being rewritten.

Thus, the state of the triggers in FIG. 2 is that appropriate forwriting information corresponding to the previously associated channel,the reading of which has already taken place in the previous position of23C.

Considering 21F, it will be seen that, from the end of period 22C?, itis inevitably in position 0 (by virtue of Zijl on Gtl), and inevitablyremains there until the end of period 22(28 (since the operation of 21Fto condition 1 depends on 21C5 and 22GB), just before 23C changes to anew position, and 21F will be now conditioned accordingly in that lastinstant of time (before MCS goes to ZiCl, 22GB goes to 22C1, and 23Cgoes to its next position), either for writing in a new character (Zijlcondition) or for re-recording (ZUG condition) the informationcorresponding to that channel in the time position of the next channel.A new character due to be written in during the next cycle of 22C isintroduced into ZiS at the end of the last cycle when ZIP was controlledand is driven out of 21S at 2155 during 22C8 of this next cycle, as willbe referred to again in due course.

FIG. 3 shows the reading circuit and includes shift registers tlStlS.The elements read by the reading arnpiifier llR are appliedprogressively to these registers under the control of the counter 22C atgates G301, 302 etc. As the intelligence is applied to the shiftregisters, stepping pulses are applied also under control of 22C, viagates G3ti3, 304 etc. It will be observed that the stepping pulses areapplied to 31S in position 22C1 only, but that for each of registers 32S38S, stepping pulses are applied in two positions of 22C. The earlier ofthese two positions has no bearing on input and will be described inconnection with FIG. 4. The eight characters read in one cycle arewritten into 31S 38S in time positions 22Cl 22C8. By the time 33S isfilled, 22C and 21C are at the ends of their cycles, and at the next 11ppulse, both will be returned to position l, and 23C advanced to its nextposition.

The beginning of the portion of drum track which has just been read isnow under the writing head, and the position of 23C corresponds to thechannel which corresponds to the next portion of drum track to be read.

FIG. 4 is concerned entirely with the re-writing of the intelligence viathe writing amplifier 11W, together with insertion of new characters.For explanatory purposes two columns of gates are shown. The left handcolumn Gitll concerns the condition when there is no new character toinsert (21F at 21f0) and the existing eight characters are returnedwhile the counter 22C steps from l to 8. It will be evident that as thecontents of each shift register is being passed to the writingamplifier, a new character is being read via 11R FIG. l to take itsplace, the incoming and outgoing gates for each register, e.g. G301,303, and G4111 being controlled by the same position (eg. 22C1) of 22C.Thus, as the rst character of one set is pulsed out of the patternregister at the end 5, element by element, to the drum, it is replaced,element by element, at the entrance l by the first character of the nextset, and so on. The new character will be associated with the followingchannel as indicated by 23C.

When a new character is being inserted and 21]1 is conducting, the righthand column of gates in FIG. 4 is effective. With these gates, thecontents of 32S-38S and 21S are recorded, the contents of 31S beingdiscarded. It is for this reason that the shift registers 328-388 areeach driven in two positions of 22C. The earlier position is used forextraction and in the following cycle the newly read character isinserted. It will be seen that in these circumstances the rst characterof the new set will be received on 31S from the drum,

at the same time that the character from 32S is being transmitted to thedrum as the first character of the previous set, and so on.

In order to allow 21F to reset at the termination of 22C7 and to be freeto re-operate for the next channel, in accordance with the condition of201a, the trigger 22F is used to control the recording of the lastcharacter, taking over the function of 21]1 at the end of 22C7, andbeing restored at the end of 22C8.

FIG. 5 gives an example of a detector which might be used to record aparticular combination or set of cornbinations of eight predeterminedcharacters, for an arbitrary channel defined by 23C3.

It should be noted that, for the example shown below, the detection madeis not exclusive, since alternate elements of the characters areignored. Clearly, for detecting a single combination all elements mustbe individually examined, either for giving positive controls (as inFIG. 5), or inhibitory controls in which the absence of the correctelements exerts a positive inhibitory control on the output to terminal501. Such an arrangement is not shown, but is well-known to thoseskilled in the art.

The triggers SIF, SEP, examine alternate elements of the characterstaken in sets of 4. It is desired to make the examination as soon as thelast character has been received from the channel, so that thischaracter will be in 21S. Since reception and retransmission arecontinuing operations, it is desirable to make the examination in twoparts. Hence, SIF and 52]? are set to position 0 at the end of period22C2, via gates G500, 502, and the first four characters are examined inperiod 22C6, after they have been completely staticised in S25-35S, SIFtriggering to position l if the sought-for conditions are found.Similarly, when the next four characters are on S68-38S and 21S, SZFoperates to position l at time 22C1 of the next cycle if, again, thesought-for conditions are found. If both Slfl and 5211 conduct, a signalis passed during 22C2 to the terminal 501, via GSM in the position of23C corresponding to the appropriate channel for which theeight-character combination is detected.

It will be evident that other pairs of triggers, such as SIF and SZF,can be added to detect other character combinations, or each can be usedto detect and to signal a different signal combination, a separate gate,such as GStll, being provided for each trigger. It will be evident thatthe output of such triggers can be used for any desired purpose.

Similarly, it is equally possible to allow the triggers, such as SIF,etc., to be used for translation purposes, the translated charactercombination being returned to the incoming channel for storage andretransmission or elsewhere as needs be.

The arrangement described illustrates only an example, and it should beunderstood that the processing carried out to a character or a pluralityof characters can take many forms. Similarly, for the indicatordetection, it should be understood that a variety of combinations ofvarious length can bc handled by the common circuit of all the channelswith which it is associated from time to time.

While the principles of the invention have been described above inconnection with specic embodiments, and particular modications thereof,it is to be clearly understood that this description is made only by Wayof example and not as a limitation on the scope of the invention.

What We claim is:

1. A data-processing system comprising a plurality of signal channelseach having combinations of signal characters appearing thereon, aplurality of individual channel stores for respective signal channels,each having a predetermined number of character positions, means commonto all said channels and responsive to the appearance of a signalcharacter on any channel for shifting the characters recorded in thestore of that channel one character position to discard the earliestrecorded character, signal character transfer equipment, common to allsaid channels, means common to all said channels and responsive to theappearance of a signal character on any channel for operating the saidtransfer equipment to transfer said character from the channel to thecharacter position in its respective store vacated by the operation ofsaid shifting means, examining means for examining the said stores eachtime a character is added to detect a predetermined one of saidcombinations of signal characters, and means controlled by the detectingof said predetermined combination for providing a signal indication.

2. A data-processing system, as set forth in claim I, wherein theshifting means includes a temporary store and associated temporary storetransfer means for transferring signal combinations stored in saidchannel stores to said temporary store for examination by said examiningmeans, means for modifying said transferred signal combination bydeleting the first stored character in a signal combination and byadding the last stored character to said combination, and means forreturning the examined and modified signal combinations to theirrespective stores.

3. A data processing system, as set forth in claim 2, in which theexamining means comprises at least one coincident gate having aplurality of inputs connected to predetermined individual clemcntalpositions of the temporary store, the signal indication appearing on theoutput of said gate when the predetermined one of the combination ofcharacters is present in the temporary store.

4. A data processing system, as claimed in claim 1, and in which thesaid individual stores together constitute a single continuous type ofstorage medium divided into contiguous sections individual to the saidnumber of channels.

5. A data processing system, as claimed in claim 4, and in which thesaid storage medium comprises a movable magnetic medium provided with areading head and a writing head, spaced apart a distance equal to thelength of one of said individual stores, and in which the charactertransfer equipment comprises timing equipment synchronously under thecontrol of timing signals derived from the storage medium and means forinserting signals transferred to these stores into the said storagemedium by the Said writing heat at times determined cyclically by saidtiming equipment.

6. A data processing system comprising a plurality of signal channelseach having combinations of signal characters appearing thereon, aplurality of individual channel stores for respective signal channels,each having a predetermined number of character' positions, meansresponsive to the appearance of a signal character on any channel forshifting the characters recorded in the store of that channel onecharacter position to discard the earliest recorded character, signalcharacter transfer equipment, means responsive to the appearance of asignal character on any channel for operating the said transferequipment to transfer said character from the channel to the characterposition in its respective store vacated by the operation of saidshifting means, examining means for examining the said stores each timea character is added to detect a predetermined one of said combinationsof said characters, and means controlled by the detecting of saidpredetermined combination for providing a signal indication, saidtransfer equipment including a butler store for recording in sequencethe single signal combinations for the said channels as such signalcombinations appear on said channels, and means in said transferequipment responsive to the recordation of a signal combination in saidbuffer store for substituting the last said signal combination in 7 8the individual store for the oldest signal combination 2,968,791 1/61Johnson 340-1725 stored therein. 3,061,192 10/ 62 Terzan S40- 172.5

References Cited by the Examine!" MALCOLM A. MORRISON, Primary Examiner.

UNITED STATES PATENTS 5 IRVING L. SRAGOW, EVERETI R. REYNOLDS,

2,764,634 9/56 Brooks 340-174 Examiners.

1. A DATA-PROCESSING SYSTEM COMPRISING A PLURALITY OF SIGNAL CHANNELSEACH HAVING COMBINATIONS OF SIGNAL CHARACTERS APPEARING THEREON, APLURALITY OF INDIVIDUAL CHANNEL STORES FOR RESPECTIVE SIGNAL CHANNELS,EACH HAVING A PREDETERMINED NUMBER OF CHARACTER POSITIONS, MEANS COMMONTO ALL SAID CHANNELS AND RESPONSIVE TO THE APPEARANCE OF A SIGNALCHARACTER OF ANY CHANNEL FOR SHIFTING THE CHARACTERS RECORDED IN THESTORE OF THAT CHANNEL ONE CHARACTER POSITION IS DISCARD THE EARLIESTRECORDED CHARACTER, SIGNAL CHARACTER TRANSFER EQUIPMENT, COMMON TO ALLSAID CHANNELS, MEANS COMMON TO ALL SAID CHANNELS AND RESPONSIVE TO THEAPPEARANCE OF A SIGNAL CHARACTER ON ANY CHANNEL FOR OPERATING THE SAIDTRANSFER EQUIPMENT TO TRANSFER SAID CHARACTER FROM THE CHANNEL TO THECHARACTER POSITION IN ITS RESPECTIVE STORE VACUATED BY THE OPERATION OFSAID SHIFTING MEANS, EXAMINING MEANS FOR EXAMINING THE SAID STORES EACHTIME A CHARACTER IS ADDED TO DETECT A PREDETERMINED ONE OF SAIDCOMBINATIONS OF SIGNAL CHARACTERS, AND MEANS CONTROLLED BY THE DETECTINGOF SAID PREDETERMINED COMBINATION FOR PROVIDING A SIGNAL INDICATION.